From tigwiki

October 2011 ...

Old vme address decoding was wasteful of addresses - 32bytes were allocated per register (only 4 needed) - plus we want a block of new addresses for the new status registers, so a change was made to the addresses - Nframe was at 0x1e0(in the middle of a large empty block!) - moved to 0x50. Note param_data was specified as 0x50 in the header file(tigcol.h) even though the address in the firmware was 0x40 (but 0x50 worked anyway due to the 32 byte range 0x40-0x5f).

A new "original" firmware with the modified nframe address has been saved at ... https://gamma.triumf.ca/tigress/New%20Folder/firmware/TIGC_SLAVE_23apr08_modOct11.zip/view and the sherekhan frontend changed to use this - If the tigress DAQ is not working these can be used as a backup. (**Note you cannot now use any older firmware without reverting the frontend changes)

Sherekhan has moved back to midtig04, and tigress moved from midtig02 to midtig06

......

midas updated to same version as sherekhan (~jun2010?) (mhttpd.c edited to remove stupid stop/pause-run confirmation)

......

sherekhan Evenbuilder and analysers now running on tigress account - eventbuilder is reading all trigger events (whatever the bank name) and accepting any event where firstword=lastword - it also seems to process each event, and then reprocess it several times at different points within the event data? (though this usually fails head=trailer test). There was also some data format differece which caused eventbuilder to not sort any tigress events - event headers included tigc port or slave address? (masked out for now)

Also the analyser spectra still don't look correct

......

Spectra had different numbers - Tigc now labelled according to master port - now 1-12 (not 7-12,1-6) - so channel numbers were all different, also Tig10 Ge were only triggering on Full Volumes.

Roody updated to the working one (required a new root - which in turn required recompiling midas and everything - nothing worked again until this was done)

.......